1. Field of the Invention
The present invention relates to a plasma address display apparatus for selectively controlling a pixel by using a plasma switch and a constant-current control apparatus for use in the plasma address display apparatus.
2. Description of the Related Art
As a flat display apparatus, a liquid crystal display apparatus has already been put into practical use in a number of fields, and enlargement of the liquid crystal display apparatus has been actively developed. In order to allow a liquid crystal display apparatus to have a high resolution and a high contrast, a method for providing an active element such as a transistor in each display pixel and driving it is generally used. However, when it is attempted to enlarge a liquid crystal display apparatus, the number of active elements is remarkably increased, which results in a decrease in a production yield.
In order to solve the above-mentioned problem, Japanese Laid-Open Publication No. 1-217396 discloses a method utilizing plasma discharge, instead of semiconductor elements such as MOS transistors and thin film transistors. Hereinafter, a structure of a liquid crystal display apparatus in which liquid crystal is driven by utilizing plasma discharge (hereinafter, referred to as a xe2x80x9cplasma address display apparatus) will be briefly described.
As shown in FIG. 7, in a plasma address display apparatus, a liquid crystal layer 103 which is an electrooptical material layer and plasma chambers P1 to Pn are disposed adjacent to each other via a thin dielectric sheet 104. Each of the plasma chambers P1 to Pn is surrounded by partition walls 105 parallel to each other and the dielectric sheet 104 on a plasma substrate 102. In each plasma chamber, ionizable gas such as He, Ne, Ar, Kr, and Xe, or mixed gas thereof is sealed. Furthermore, electrodes 106 are formed in each plasma chamber on the plasma substrate 102, and the electrodes 106 function as an anode electrode and a cathode electrode for ionizing gas in each plasma chamber to generate plasma discharge.
On the other hand, the liquid crystal layer 103 is interposed between the dielectric sheet 104 and a transparent substrate 101, and the periphery of the liquid crystal layer 103 is sealed with a sealant 108. On the surface of the transparent substrate 101 on the liquid crystal layer side, stripe-shaped signal electrodes 107 are formed. The signal electrodes 107 cross the plasma chambers P1 to Pn, and each crossed portion of the signal electrodes 107 and the plasma chambers P1 to Pn correspond to each display pixel.
In the plasma address display apparatus, the plasma chambers P1 to Pn in which plasma is discharged are scanned successively in this order, and in synchronization with this, the signal electrodes 107 on the liquid crystal layer 103 side are supplied with a signal voltage, whereby the signal voltage is held by each pixel, and the liquid crystal layer 103 is driven. Thus, each of the plasma chambers P1 and Pn correspond to one scanning line. The adjacent plasma chambers of the plasma chambers P1 to Pn are separated by a partition wall.
FIG. 8 schematically shows a pixel. In FIG. 8, reference 110 denotes an anode electrode, 111 denotes a cathode electrode, 112 denotes a plasma switch operated by plasma discharge, and 113 denotes a signal electrode. The plasma switch 112 is turned on when a desired voltage is applied to the cathode electrode 111, and is turned off when the voltage of the cathode electrode 111 becomes equal to that of the anode electrode 110.
A capacitor Ct corresponds to a capacitance of the dielectric sheet 104 in FIG. 7, and a capacitor CLC corresponds to a capacitance of the liquid crystal layer 103 in FIG. 7. By applying a desired voltage to the signal electrode 113 when the plasma switch 112 is turned on, an voltage between the anode electrode 110 and the signal electrode 113 is divided by the capacitors Ct and CCL, and a desired voltage is applied to the liquid crystal layer 103. If the plasma switch 112 is turned off in this state, the voltage applied to the liquid crystal layer 103 is held until the plasma switch 112 is turned on again.
FIG. 9 is a schematic circuit diagram of a plasma address display apparatus. In this figure, each pixel pix is further simplified, compared with FIG. 5.
A plurality of pixels are arranged in a matrix. Anode electrodes 120 and cathode electrodes 121 are arranged in rows, and signal electrodes VL1, VL2, . . . , VLn are arranged in columns. The anode electrodes 120 are commonly fixed at the identical voltage, and the cathode electrodes 121 are independently connected to switches S1, S2, . . . , Sn. The switches S1, S2, . . . , Sn are for switching an voltage of the cathode electrodes 121.
Next, driving of the plasma address display apparatus will be briefly described.
Under the condition that plasma discharge is not generated, the dielectric sheet 104 is electrically insulated from the anode electrode 120 and the cathode electrode 121. When an voltage which is negative to the anode electrode 120 is applied to the cathode electrode 121, plasma discharge is generated.
Due to the plasma discharge, space charges of ions and electrons is generated in the plasma chamber, whereby the voltage in the plasma chamber becomes equal to that of the anode electrode 120. At this time, the voltage of the lower surface of the dielectric sheet 104 becomes equal to that of the anode electrode 120, which means that a virtual electrode is formed. When a data voltage is applied to the signal electrode 107 based on the voltage of the anode electrode 120, the data voltage is divided in accordance with a ratio between the capacitance of the dielectric sheet 104 and that of the liquid crystal layer 103. As a result, desired data is written in a display pixel.
When the voltage of the cathode electrode 121 is returned to be equal to that of the anode electrode 120, the plasma discharge is finished. After the plasma discharge is finished, the space charges are decayed gradually, and the plasma chamber returns to an insulated state. This state is the same as the state where the plasma switch 112 is turned off, and a voltage is not applied to the liquid crystal layer 103. However, the charge accumulated on the surface of the dielectric sheet 104 is held in the liquid crystal until the subsequent discharge is generated. Because of this operation, a sample-and-hold drive which is similar to that of a liquid crystal apparatus using ordinary active elements is conducted.
It is more advantageous in terms of desirably writing data in a pixel that the data voltage applied to the signal electrode 107 continues to be applied until the plasma chamber returns to an insulated state. However, as the period of applying a data voltage is extended, crosstalk in the vertical direction becomes more likely to occur. This is a trade-off relationship. Thus, the applied voltage is reset slightly before the plasma chamber returns to an insulated state. As a result, the charge held in the liquid crystal layer 103 is slightly changed; however, this change is suppressed to such a degree that no substantial problem arises.
Among the space charges, some particles are excited in a metastable state, and thereafter, returns to the basic state. Therefore, even after the plasma discharge is finished, such metastable atoms remain for a relatively long period of time, and generate a trace amount of paired ions and electrons. Thus, the plasma switch 112 holds a conductive state for a while after the finish of the plasma discharge. The plasma switch 112 returns to a non-conductive state only when the metastable atoms substantially completely return to the basic state. Therefore, the charge eventually written in each display pixel depends upon a decay time xcfx84 1 from the time when the plasma discharge is finished to the time when the metastable atoms return to the basic state.
However, the above-mentioned decay time is required to be at least shorter than a period from the time when plasma discharge in a plasma chamber Pk is finished to the time when plasma discharge in the subsequent plasma chamber PK+1 is started. In particular, a selection period assigned to one scanning line becomes shorter with the advancement of high resolution, so that it becomes more necessary to shorten the decay time. The selection period assigned to one scanning line is about 32 xcexcs, for example, in a VGA-grade panel. However, the selection period is about 15 xcexcs in a high-definition TV.
Moreover, if the decay time can be shortened, a data voltage applied during the selection period can be reset in earlier time, which makes it possible to shorten the apply period of a data voltage. Thus, there is an increased demand for shortening the decay time. Herein, a period from the time when plasma discharge is finished to the time when a data voltage applied to the signal electrode is reset is defined as a xe2x80x9cdecay time of decay voltagexe2x80x9d.
Japanese Laid-Open Publication No. 8-313883 discloses a plasma address display panel, in which in addition to He, Ne, Ar, Kr, Xe, or the like, or mixed gas thereof sealed in plasma chambers, trace amounts of the other components are contained therein, whereby the decay time can be readjusted.
However, according to the technique disclosed in Japanese Laid-Open Publication No. 8-313883, a gas component ratio in each plasma chamber is changed every time the decay time is adjusted, which requires confirmation of reliability such as blackening. Furthermore, once gas is sealed in the plasma chambers, it is impossible to readjust the decay time. Still furthermore, it is very difficult to control amounts of components to be added so as to obtain a desired decay time.
A plasma address display apparatus, includes: a plasma substrate on which a plurality of plasma chambers are arranged in rows, the plasma chambers including at least an anode electrode and a cathode electrode; an opposite substrate on which a plurality of signal electrodes are arranged in columns; and a liquid crystal layer provided between the plasma substrate and the opposite substrate, wherein the plurality of plasma chambers are selectively discharged and a desired data voltage is selectively applied to the plurality of signal electrodes, whereby a desired display is performed, the apparatus further including a discharge current control circuit for switching a discharge current flowing through the plasma chambers to at least three values of a first discharge current at the commencement of plasma discharge, a second discharge current immediately before the finish of plasma discharge, and a third discharge current after the finish of plasma discharge.
By switching the discharge current, a decay time can be shortened. In particular, by suppressing the second discharge current, it becomes possible to shorten the time for decaying space charges after the finish of plasma discharge, and to further shorten the decay time.
In one embodiment of the present invention, the discharge current control circuit has at least one constant-current circuit, and the discharge current is controlled by using the at least one constant current circuit.
In another embodiment of the present invention, the discharge current is controlled by controlling a voltage applied to the cathode electrodes.
In another embodiment of the present invention, the discharge current control circuit controls a waveform of the discharge current in the plasma chambers in the form of steps.
In another embodiment of the present invention, the discharge current control circuit controls a waveform of the discharge current in the plasma chambers in the form of slopes.
In another embodiment of the present invention, a timing at which a desired data voltage starts being applied to the signal electrodes comes before a timing at which a plasma chamber where pixels for writing the data voltage are switched starts being discharged. Because of this, it becomes possible to write a data voltage in each pixel at a high speed, and to shorten the time required for writing the data voltage. Particularly, in the case where the decay time is controlled, and a selected plasma chamber can be set in an insulated state before the completion of a selection period, even when the timing at which a data voltage is applied to the signal electrodes comes before the timing at which a selection period of a pixel for writing the data voltage starts, the data voltage is not written in a pixel in the previous row. Therefore, the above-mentioned structure is particularly useful.
A constant-current control apparatus of the present invention includes a plurality of constant-current circuits having control terminals which are independent from each other, wherein sink current terminals of the constant-current circuits are commonly connected, and each of the control terminals is independently controlled.
A constant-current control apparatus of the present invention includes a current mirror circuit having first and second transistors whose bases are connected to each other, in which an emitter of each of the first and second transistors is connected to a first power supply line through first and second resistors, and a collector of the second transistor is connected to the base of the second transistor, wherein third and fourth resistors having different resistances are connected in parallel to the base of the second transistor in the current mirror circuit, and an voltage applied to the third and fourth resistors is controlled, whereby a collector current of the first transistor in the current mirror circuit is controlled.
As described above, the discharge current can also be controlled by using the current mirror circuit. In this case, by providing a sufficient difference in resistance between the third and fourth resistors, in the case where a xe2x80x9cHIGHxe2x80x9d signal is applied to both the third and fourth resistors, the current mirror circuit can be controlled, giving a priority to a signal with a low resistance.
In one embodiment of the present invention, a capacitance component is provided between the base of the second transistor and the first power supply line.
Thus, the invention described herein makes possible the advantages of (1) providing a plasma address display apparatus capable of adjusting a decay time by a simpler method; and (2) providing a constant-current control apparatus for use in the plasma address display apparatus.